D Flip Flop

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D Flip-Flop (NAND) - Interactive
D Flip-Flop (NAND) – Interactive
Toggle D and CLK inputs and observe the flip-flop state. **CLK=1** enables data capture.
D:
CLK:
Outputs: Q0 Q̅1
Circuit Diagram [Image of a D Flip-Flop using NAND gates]
Timing Diagram (D Input Combinations)
D=0, CLK=0 D=0, CLK=1 D=1, CLK=0 D=1, CLK=1 D CLK Q Q̅
Current: D=0, CLK=0 → Hold State (CLK Disabled) (Q=0, Q̅=1)

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