SR Latch using NOR Gates

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SR Latch using NOR Gates - Corrected Timing Diagram
SR Latch using NOR Gates – Interactive
Toggle S and R inputs and observe the latch state. Inputs are **active-HIGH**.
S:
R:
Outputs: Q0 Q̅1
Circuit Diagram [Image of SR Latch using NOR gates circuit diagram]
Timing Diagram (Input Combinations)
S=0, R=0 S=0, R=1 S=1, R=0 S=1, R=1 S R Q Q̅
Current: S=0, R=0 → Hold State (Q=0, Q̅=1)

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